Product Summary

The Virtex-4? Family is the newest generation FPGA from Xilinx. The innovative Advanced Silicon Modular Block or
ASMBL? column-based architecture is unique in the programmable logic industry. Virtex-4 FPGAs contain three families
(platforms): LX, FX, and SX. Choice and feature combinations are offered for all complex applications. A wide array of
hard-IP core blocks complete the system solution. These cores include the PowerPC? processors (with a new APU
interface), Tri-Mode Ethernet MACs, 622 Mb/s to 10+ Gb/s serial transceivers, dedicated DSP slices, high-speed clock
management circuitry, and source-synchronous interface blocks. The basic Virtex-4 building blocks are an enhancement of
those found in the popular Virtex-based product families: Virtex, Virtex-E, Virtex-II, Virtex-II Pro, and Virtex-II Pro X, allowing
upward compatibility of existing designs. Virtex-4 devices are produced on a state-of-the-art 90-nm copper process, using
300 mm (12 inch) wafer technology. Combining a wide variety of flexible features, the Virtex-4 family enhances
programmable logic design capabilities and is a powerful alternative to ASIC technology.

Parametrics

Xesium Clock Technology
? Up to twenty Digital Clock Manager (DCM) modules
- Precision clock deskew and phase shift
- Flexible frequency synthesis
- Dual operating modes to ease performance
trade-off decisions
- Improved maximum input/output frequency
- Improved phase shifting resolution
- Reduced output jitter
- Low-power operation
- Enhanced phase detectors
- Wide phase shift range
? Companion Phase-Matched Clock Divider (PMCD)
blocks
? Differential clocking structure for optimized low-jitter
clocking and precise duty cycle
? 32 Global Clock networks
? Regional I/O and Local clocks
Flexible Logic Resources
? Up to 40% speed improvement over previous
generation devices
? Up to 200,000 logic cells including:
- Up to 178,176 internal registers with clock enable
(XC4VLX200)
- Up to 178,176 look-up tables (LUTs)
- Logic expanding multiplexers and I/O registers
? Cascadable variable shift registers or distributed
memory capability
500 MHz XtremeDSP Slices
? Dedicated 18-bit x 18-bit multiplier,
multiply-accumulator, or multiply-adder blocks
? Optional pipeline stages for enhanced performance
? Optional 48-bit accumulator for multiply accumulate
(MACC) operation
? Integrated adder for complex-multiply or multiply-add
operation
? Cascadeable Multiply or MACC
? Up to 100% speed improvement over previous
generation devices.
500 MHz Integrated Block Memory
? Up to 10Mb of integrated block memory
? Optional pipeline stages for higher performance
? Multi-rate FIFO support logic
- Full and Empty Flag support
- Fully programmable AF and AE Flags
- Synchronous/ Asynchronous Operation
? Dual-port architecture
? Independent read and write port width selection (RAM
only)
? 18 Kbit blocks (memory and parity/sideband memory
support)
? Configurations from 16K x 1 to 512 x 36
(4K x 4 to 512 x 36 for FIFO operation)
? Byte-write capability (connection to PPC405, etc.)
? Dedicated cascade routing to form 32K x 1 memory
without using FPGA routing
? Up to 100% speed improvement over previous
generation devices.

Features

Summary of Virtex-4 Features
? Three families LX/SX/FX
- Virtex-4 LX: High-performance logic applications solution
- Virtex-4 FX: High-performance, full-featured solution for
embedded platform applications
- Virtex-4 SX: High-performance solution for Digital Signal
Processing (DSP) applications
? Xesium? Clock Technology
- Digital Clock Manager (DCM) blocks
- Additional Phase-Matched Clock Dividers (PMCD)
- Differential Global Clocks
? XtremeDSP? Slice
- 18x18, two’s complement, signed Multiplier
- Optional pipeline stages
- Built-In Accumulator (48-bits) & Adder/Subtracter
? Smart RAM Memory Hierarchy
- Distributed RAM
- Dual-Port 18-Kbit RAM blocks
· Optional pipeline stages
· Optional programmable FIFO logic - Automatically
remaps RAM signals as FIFO signals
- High-speed memory interface support: DDR and DDR-2
SDRAM, QDR-II, RLDRAM-II, and FCRAM-IISelectIO Technology
- 1.5 to 3.3 V I/O Operation
- Built-In ChipSync? Source-Synchronous Technology
- Digitally-controlled impedance (DCI) active termination
- Fine grained I/O banking (Configuration in one bank)
? Flexible Logic Resources
? Secure Chip AES Bitstream Encryption
? 90-nm copper CMOS process
? 1.2V core voltage
? Flip-Chip Packaging including Pb-Free package
choices.
? RocketIO? 622 Mb/s to 10+ Gb/s Multi-Gigabit
Transceivers (MGT) (FX only)
? IBM PowerPC RISC Processor Core (FX only)
- PowerPC 405 (PPC405) Core
- Auxiliary Processor Unit Interface (User Coprocessor)
? Multiple Tri-Mode Ethernet MACs (FX only)SelectIO Technology
? Up to 960 user I/Os
? Wide selections of I/O standards from 1.5V to 3.3V
? Extremely high-performance
- 600 Mb/s HSTL & SSTL (on all single-ended I/O)
- 1 Gb/s LVDS (on all differential I/O pairs)
? True differential termination
? Selected low-capacitance I/Os for improved signal
integrity
? Same edge capture at input and output I/Os
? Memory interface support for DDR and DDR-2
SDRAM, QDR-II, RLDRAM-II, and FCRAM-II
ChipSync Technology
? Integrated with SelectIO technology to simplify
source-synchronous interfaces
? Per-bit deskew capability built in all I/O blocks (variable
input delay line)
? Dedicated I/O and regional clocking resources (pin and
trees)
? Built in data serializer/deserializer logic in all I/O and
clock dividers
? Memory/Networking/Telecommunication interfaces up
to 1 Gb/s+Digitally Controlled Impedance (DCI)
Active I/O Termination
? Optional series or parallel termination
? Temperature compensation
Configuration
? 256-bit AES bitstream decryption provides intellectual
property (IP) security
? Improved bitstream error detection/correction capability
? Fast SelectMAP configuration
? JTAG support
? Readback capability
90 nm Copper CMOS Process
1.2V Core Voltage
Flip-Chip Packaging
? Pb-Free packages available with production devices.


Diagrams

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
XC4VLX60-11FFG1148C
XC4VLX60-11FFG1148C


IC FPGA VIRTEX-4 60K 1148-FBGA

Data Sheet

0-1: $557.80
Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
XC4VFX100-10FF1152I
XC4VFX100-10FF1152I


IC FPGA VIRTEX-4FX 1152FFBGA

Data Sheet

0-1: $1,732.46
XC4VFX100-10FF1517I
XC4VFX100-10FF1517I


IC FPGA VIRTEX-4FX 1517FFBGA

Data Sheet

0-1: $1,819.44
XC4VFX100-10FFG1152C
XC4VFX100-10FFG1152C


IC FPGA VIRTEX-4FX 100K 1152FBGA

Data Sheet

0-1: $1,386.13
XC4VFX100-10FFG1152I
XC4VFX100-10FFG1152I


IC FPGA VIRTEX-4FX 100K 1152FBGA

Data Sheet

0-1: $1,732.46
XC4VFX100-10FFG1517C
XC4VFX100-10FFG1517C


IC FPGA VIRTEX-4FX 100K 1517FBGA

Data Sheet

0-1: $1,455.55
XC4VFX100-10FFG1517I
XC4VFX100-10FFG1517I


IC FPGA VIRTEX-4FX 100K 1517FBGA

Data Sheet

0-1: $1,819.44